An analogue SIMD focal-plane processor array
نویسندگان
چکیده
A new smart-sensor VLSI circuit intended for focal-plane processing of grey-scale images is presented. The architecture is based on a fine-grain software-programmable SIMD array. Processing elements, integrated within each pixel of the imager, are implemented utilising a switched-current analogue microprocessor concept. In a 0.6μm CMOS process the cell size is equal to 98.6μm×98.6μm. A prototype 21×21 array chip executes over 1.1 GIPS (Giga Instructions Per Second) while dissipating below 40mW of power and demonstrates a real-time performance on a variety of early vision tasks.
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تاریخ انتشار 2001